Semiconductor device geometries have dramatically decreased in size since such devices were first introduced several decades ago. As a result, there has been an increase in circuit density on the semiconductor substrate. The increasing circuit densities have placed additional demands on processes used to fabricate semiconductor devices.
Photolithography is a technique used to form precise patterns on substrates to be etched to form the desired devices or features. Generally, photolithography techniques use light patterns to expose photoresist materials deposited on a substrate surface to develop precise patterns on the substrate surface prior to the etching process. In conventional photolithographic processes, a photoresist is applied on the material to be etched, and the features to be etched in the material, such as contacts, vias, or interconnects, are defined by exposing the photoresist to a pattern of light through a photolithographic photomask which corresponds to the desired configuration of features. A light source emitting ultraviolet (UV) light, for example, may be used to expose the photoresist to chemically alter the composition of the photoresist. The altered or the unaltered photoresist material is then removed by chemical processes to expose the underlying material of the substrate while the retained photoresist material remains as a protective coating. Once the desired photoresist material is removed to form the desired pattern in the photoresist, the exposed underlying material is then etched to form the features in the substrate surface.
Photolithographic photomasks, or reticles, typically include a substrate made of an optically transparent silicon based material, such as quartz, i.e., silicon dioxide (SiO2), having an opaque light-shielding layer of metal, typically chromium, patterned on the surface of the substrate. The metal layer is patterned to form features which define the pattern and correspond to the dimensions of the features to be transferred to the substrate. Generally, conventional photomasks are fabricated by first depositing a thin layer of metal on a substrate comprising an optically transparent silicon based material, such as quartz, and depositing a photoresist layer on the thin metal layer. The photoresist is then patterned using conventional patterning techniques. The metal layer is etched to remove material not protected by the photoresist, thereby exposing the underlying silicon based material.
In order to achieve current circuit densities, alternating phase shift photomasks are being used to increase the precision of the etching pattern formed on the substrate by increasing the resolution of the image of created by the photomask. Alternating phase shift photomasks are fabricated by the same method described above, but with the additional step of etching the exposed silicon based material to form features that phase shift the light passing through by 180 degrees. The phase shifted light increases contrast at feature edges, thereby allowing the formation of more precise patterns on the underlying substrate. The extent of phase shift is based on the composition and thickness of the substrate. The photomask features are etched into the silicon based material to change the thickness of the material, and thus change the phase of the light. To produce the desired phase shift, the etched features formed in the silicon based material of the substrate must be precisely formed in the substrate with a minimal amount of defects in the feature structure.
Due to the high number of steps required in the manufacture of a semiconductor device, each step in the device fabrication process must have a high yield. The quality of the photomask has a direct impact on this yield, e.g., any defects or pattern errors in the photomask are faithfully reproduced in each of the wafers exposed to that mask.
In an effort to avoid these patterning errors, photomask patterns are subjected to comprehensive measurements during the fabrication of the photomask. The fidelity of the photomask pattern is checked at various points in the photomask fabrication process. For example, in order to isolate any pattern errors introduced by the plasma etch process, patterns (critical dimensions or CDs) are measured prior to etching (typically by scanning electron microscopy). Once the etch process has been completed and the masking layer removed (stripped), the same patterns are re-measured.
Through the comparison of the pre-etch and post-etch measurements, values for CD bias and CD linearity are calculated and evaluated. CD bias is a measure of the width change of a feature during the process (for example a resist line that measures 300 nm wide prior to etch is measured as 290 nm wide after etch would result in a CD bias of 10 nm). CD linearity examines the CD bias over a range of feature sizes (for example if the CD bias of a 300 nm line is 10 nm and the CD bias of a 1000 nm line is 14 nm then the CD linearity for the process is reported as 4 nm over the range of 300–1000 nm features).
The resolution of an etching process is a measure of the fidelity of pattern transfer, which can be quantified by an etch bias quantity. Bias refers to the difference in lateral dimension between the etched image and the mask image. A zero-bias process produces a vertical edge profile coincident with the edge of the mask. In other words, the mask, the etched device feature layer and the patterned photoresist would all be precisely aligned. In this case, there is no etching of the device feature layer or the photoresist in the lateral direction, and the pattern is perfectly transferred. This case represents the extreme of anisotropic etching.
In earlier photomask technology, a single feature size was deemed most important, so the entire lithographic printing process was centered and adjusted to produce this critical feature size.
Whereas, current photomask technology (90 nm Node and Beyond) requires that several critical feature sizes be fabricated on the photomask at once, with all features being of equal importance. As such, the etch difference or linearity, between these several feature sizes is now becoming quite critical. Critical Dimension (CD) Etch Linearity is defined as the difference in CD Bias between small and large feature sizes within the same pattern on a photomask. Typically, the small and large features are between 0.1 μm and 1.5 μm.
At the 90 nm technology node and beyond, the increasing need for improved CD Etch Linearity and the absolute size fidelity of the chromium feature on the photomask compared to the design data (a.k.a. CD Etch Bias) is an obstacle for timely and cost effective reticle fabrication.
High quality photomasks and reticles contain features which span several linewidths; in this way, a photomask can transfer the actual pattern of a semiconductor device to the wafer during the lithography process. A reduction of CD Etch Linearity, even at a small level, is considered significant and enabling for future photomask technology nodes to succeed.
Therefore, the production of features within the photomask which are of the correct absolute size has become more critical with advancing device technology nodes. This absolute feature size fidelity, or CD Etch Bias, is typically achieved by altering the data stream during the pattern generation of the initial resist mask on top of the blanket chromium layer on the reticle blank.
The chromium plasma etching step within an advanced photomask fabrication process is normally considered responsible for most of the loss of CD Etch Bias experienced during the total photomask patterning steps. As with CD Etch Linearity, a reduction of CD Etch Bias, even at a small level, is considered significant and enabling for future photomask technology nodes to succeed.
Currently, as shown in FIG. 1, a conventional high density plasma chamber with an RF generator 100 operating at 2 MHz which provides power to the inductively coupled plasma coil 105, a radio frequency (RF) bias generator 110 operating at 13.56 MHz which provides power to the lower electrode 115 through an impedance matching network 120, gas inlets 130 for providing a process gas to the chamber 135, a pump port 140 for evacuating the chamber are used to etch photomasks 145. This technology is sufficient for less advanced photomasks which utilize chromium films which are thicker, e.g., approximately 1000 Å and less constrained by CD etch performance. Generally, current plasma etch reactors for photomask fabrication produce a 50 nm to 60 nm CD Etch Bias, with approximately a 40 nm CD Etch Linearity. Accordingly, current technology plasma etch reactors produce CD Etch Linearity and CD Etch Bias which do not meet the roadmap for 90 nm technology node and beyond.
Therefore, there is a need for a plasma reactor design and method to etch optical absorber films on photomasks and reticles with a CD Etch Bias of less than 30 nm and a CD Etch Linearity of less than 10 nm.
Nothing in the prior art provides the benefits attendant with the present invention.
Therefore, it is an object of the present invention to provide an improvement which overcomes the inadequacies of the prior art devices and which is a significant contribution to the advancement to the processing of photomasks and reticles.
Another object of the present invention is to provide a method for etching a photolithographic substrate comprising the steps of: placing the photolithographic substrate on a support member in a vacuum chamber; introducing at least one process gas into the vacuum chamber; generating a plasma; supplying an RF bias at or below the ion transit frequency to the support member in the vacuum chamber; and etching the photolithographic substrate.
Yet another object of the present invention is to provide a method for etching at least one material on a photolithographic substrate comprising the steps of: placing the photolithographic substrate on a support member in a vacuum chamber; introducing at least one process gas into the vacuum chamber; generating a plasma; supplying an RF bias at or below the ion transit frequency to the support member in the vacuum chamber; and etching at least one material from the photolithographic substrate.
Still yet another object of the present invention is to provide an apparatus for processing a photolithographic substrate comprising: a vacuum chamber; at least one gas supply communicating with said vacuum chamber for providing at least one process gas to said vacuum chamber; a plasma generating source for generating a plasma in said vacuum chamber; and an RF power source operating at an RF bias frequency at or below the ion transit frequency, said RF power source coupled to the photolithographic substrate support.
Another object of the present invention is to provide a method for etching a photolithographic substrate comprising the steps of: placing the photolithographic substrate on a support member in a vacuum chamber; introducing at least one process gas into the vacuum chamber; generating a plasma; supplying an RF bias to the support member in the vacuum chamber; controlling the level of the RF bias; and etching the photolithographic substrate.
The foregoing has outlined some of the pertinent objects of the present invention. These objects should be construed to be merely illustrative of some of the more prominent features and applications of the intended invention. Many other beneficial results can be attained by applying the disclosed invention in a different manner or modifying the invention within the scope of the disclosure. Accordingly, other objects and a fuller understanding of the invention may be had by referring to the summary of the invention and the detailed description of the preferred embodiment in addition to the scope of the invention defined by the claims taken in conjunction with the accompanying drawings.